Robust Low Power VLSI Group
My research group at UVA is the new Robust Low Power VLSI Group. We have selected this name to indicate our focus on the major problems in circuit design: power and variations. Our research interests include low power digital circuit design, sub-threshold digital circuits, SRAM design for end-of-the-roadmap silicon, variation tolerant circuit design methodologies, and medical applications for low energy electronics. The RLPVLSI group is engaged in projects related to each of these topics.

Please visit our group webpage for more information:
Calhoun Research Group Webpage

ECE Wiki
In an effort to improve upon the way that information is created, shared, and preserved for graduate students and their advisors, I founded the ECE wiki.

Please use this link to log in to the:
UVA ECE wiki

Current Funded Research

• Virtual Prototyping (ViPro) Tool for Memory Subsystem Design Exploration and Optimization
  - funded by the Global Research Collaboration branch of the Semiconductor Research Corporation.
• Virtual Prototyping (ViPro) Tool for Memory Subsystem Design Exploration and Optimization
  - funded by nanoSTAR.
• Energy Efficient Reconfigurable Logic for Ultra Low Power Ubiquitous Computing Systems
  - funded by the NSF.
• Development and Testing of an Ultra Low Power System-On-Chip (SOC) Platform for Marine Mammal Tags and Passive Acoustic Signal Processing
  - funded by ONR.
• Predicting Nanoscale SRAM Vmin: A statistical approach incorporating dynamic functional margin analysis
  - funded by ARM.
• Body Area Sensor Networks: A Holistic Approach from Silicon to Users
  - funded by the NSF.
• High Reliability SRAM for Extreme Environmental Conditions
  - funded by Freescale Semiconductor through the Global Research Collaboration branch of the Semiconductor Research Corporation.
• Hardware Support for Deterministic but On-Demand Redundancy
  - funded by Freescale Semiconductor through the Global Research Collaboration branch of the Semiconductor Research Corporation.
• Heterogeneous Multi-core Architectures from Homogeneous Arrays using Configurable Interconnect
  - jointly funded by the NSF and the Semiconductor Research Corporation.
• Detection and Tracking of Submerged Hydrodynamic Wakes Using a Bioinspired Hybrid Fluid Motion Sensor Array
  - funded by ONR.
• Implementable Privacy and Security for Resource-Constrained Devices
  - funded by NSF.
• Ultra Low Power Processing in Wireless Sensor Nodes
  - funded by the NVL through WiCAT.

Completed Research Projects

• Innovative Approaches to Low Power, Sub-Threshold Electronic Circuits: Power Distribution
  - funded by a DARPA SBIR Phase II award.
• Integration of Sub-threshold Circuits and Novel Ultra Low Power, High Performance Non-Volatile Memory Technology
  - funded by a DARPA SBIR Phase II award.
• Wireless Real-Time Monitoring of Research Animals
  - funded by the NIH.
• CI-P: Development of Community Infrastructure for Body Sensor Network Research, Education, and Support
  - funded by the NSF.
• REESES: Rapid Efficient Energy Scalable ElectronicS for Embedded Applications
  - funded by DARPA.
• SRAM Circuit Design and Optimization at 45nm and Below
  - funded by C2S2.
• Variation Insensitive Low-Power SRAM Design Using Circuit Adaptation and Tuning
  - funded by Freescale Semiconductor through the Global Research Collaboration branch of the Semiconductor Research Corporation.
• A Sub-threshold FPGA for Ultra-Low-Power Applications
  - funded by a DARPA Young Faculty Award.
• Prototyping a Biotelemetric Patch for Medical Applications
  - funded by the NSF through WiCAT.
• An Ultra-Low Energy Voltage Dithered Processor Core for Medical Sensing Applications
  - funded by UVA FEST and by the Southeastern Center for Electrical Engineering Education (SCEEE).
• Low-Power SRAM in Deep-Sub-Micron Processes
  - funded by C2S2.